priority interrupt
英 [praɪˈɒrəti ˌɪntəˈrʌpt]
美 [praɪˈɔːrəti ˌɪntəˈrʌpt]
网络 优先中断
双语例句
- Prioritize the applications by how critical they are to running your business software priority interrupt
按照应用程序对企业运营的关键程度区分其优先次序程序优先级中断-由程序进行中断 - If high priority interrupts are not disabled during low priority interrupts, users must save the key registers in software during a low priority interrupt.
如果在响应低优先级中断时高优先级中断使能，用户必须在低优先级中断响应程序中保存那些关键的寄存器值。 - A programmed or designed hardware implementation of priority interrupt functions.
一种程控的或设计的硬件优先级中断功能的实现。 - Interrupt handling code runs at the thread's priority, which lets you specify the priority of the interrupt handling.
就是说，处理中断的就是这个线程，而其优先级可以被指定。 - Lake-level Variation Response to Tectonic Subsidence in a Second-Order Sequence of Continental Rift Basin software priority interrupt
陆相断陷盆地二级层序时限构造沉降与湖平面变化的响应关系程序优先级中断-由程序进行中断 - It provides extendable interrupt priority by using soft interrupt vector.
通过构建较中断向量表，提供可扩展的中断优先级； - The consideration of priority and triggering time are helpful for other complex interrupt module architecture.
中断标识信号的优先级与触发时刻的考虑对更复杂中断电路的设计也具有很好的借鉴意义。 - An inhibitor arc is used to induce the fact that the higher priority user will interrupt the service of a lower priority user.
为了实现高优先级用户对低优先级用户服务中断的模拟，采用了基于变迁的抑制弧。 - A new concept about interrupt priority cyclic rotation is proposed in this paper. The hardware placement and programming method for the discrete data acquisition system which is satisfied with the principle of interrupt priority cyclic rotation are discussed in detail.
本文提出了中断优先权循环浮动的新概念，讨论了离散型数据采集系统满足中断优先权循环浮动原则的硬件配置与软件设计方法。 - Based on micro kernel architecture, the multitasking kernel of HEROS implements a priority based preemptive scheduler, high efficiency intertask synchronization and communication routines, real time interrupt services and high efficiency memory management.
HEROS基于微内核体系结构，其多任务内核实现了基于优先级的抢先式调度，高效率的任务间同步和通信原语，实时的中断处理和高效的内存管理机制。 - Design and Implementation of a Parallel Priority Interrupt System in Fast MCU's
高速MCU核中并行优先级中断系统的设计与实现 - Designed and implemented the Memory Access Management Unit that supports functions such as automatic-reload, configurable priority, configurable interrupt source, display memory control, circulation address etc.3.
设计实现了具有可自动重载、多优先级配置、多中断源配置、显存控制、循环寻址等功能的高效访存管理部件。 - First, the thorough analysis on VME bus interface is carried out: the operation principle and mechanism of the data transfer bus and priority interrupt bus, providing the foundation for VME interface logic design.
首先，对VME总线接口进行了深入分析，包括数据传输总线和优先级中断总线的操作原理与运行机制，为VME接口逻辑设计提供了基础。